You must understand the truth table of a NAND gate in order to understand its features. A truth table is not hard to understand, it is simply a table that shows each input condition, and what the output is. For example, if input A is low, but input B is high, the output C will be high. The only time the output C is low is if both inputs are high.
Most chips have input voltage requirements. This is usually set between 2 to 7 volts. Engineers, however, like to use 5 volts DC as the high or low logic states, and for powering the chip. This is pretty much an industry standard. Only DC voltage can be used to power the chip.
A quad input NAND integrated circuit chip has four NAND gates inside one chip. It looks like a centipede, with fourteen small metal pins or tabs sticking out of the body like legs. The body has a notch in one short side, making it the head. If you hold the head to your left, pin 1 is at the bottom, near the head. Pin 7 is on the bottom, farthest away from the head. On top, pin 14 is nearest the head, and pin 8 is farthest away from the head. In other words, start at the bottom near the notch, and count counter-clockwise, going all the way around a the chip. Pins one through seven are at the bottom, and pins eight through fourteen are at the top. This is the standard pin configuration for all quad input NAND gates.
Another feature of the this chip is all the internal pin wiring is standardized. Pin 7 is the ground, and pin 14 is the positive voltage to power the chip, called Vcc. Vcc and all logic voltage is usually 5 volts DC. Pin 1 is A, pin 2 is B, and pin 3 is C of the first gate. Pin 4 is A, pin 5 is B, and pin 6 is C of the second gate. Pin 9 is A, pin 10 is B, and pin 8 is C of the third gate. Pin 12 is A, pin 13 is B, and Pin 11 is C of the fourth gate. Notice that gates 3 and 4 are a mirror image of gates 1 and 2. If you draw a centipede with 14 legs, seven on each side, you get a good idea of how the gates are wired internally in the chip.